A Fully integrated D-band Direct-Conversion I/Q Transmitter and Receiver Chipset in SiGe BiCMOS Technology

This paper presents design and characterization of single-chip 110-170 GHz (D-band) direct conversion in-phase/quadrature-phase (I/Q) transmitter and receiver monolithic microwave integrated circuits (MMICs), realized in a 130 nm SiGe BiCMOS process with ft/fmax of 250 GHz/370 GHz. The chipset is suitable for low power wideband communication and can be used in both homodyne and heterodyne architectures. The Transmitter chip consists of a six-stage power amplifier, an I/Q modulator, and a LO multiplier chain. The LO multiplier chain consists of frequency sixtupler followed by a two-stage amplifier. It exhibits a single sideband conversion gain of 23 dB and saturated output power of 0 dBm. The 3 dB RF bandwidth is 31 GHz from 114 to 145 GHz. The receiver includes a low noise amplifier, I/Q demodulator and x6 multiplier chain at the LO port. The receiver provides a conversion gain of 27 dB and has a noise figure of 10 dB. It has 3 dB RF bandwidth of 28 GHz from 112-140 GHz. The transmitter and receiver have dc power consumption of 240 mW and 280 mW, respectively. The chip area of each transmitter and receiver circuit is 1.4 mm x 1.1 mm

Transmitter and Receiver Circuits for a High-Speed Polymer Fiber-Based PAM-4 Communication Link

A high data rate RF-DAC and a power detector (PD) are designed and fabricated in a 250 nm indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. A communication link using the Tx-Rx over polymer microwave fiber (PMF) is measured. The link consists of a pulse amplitude modulation (PAM) modulator and a PD as a demodulator, as well as a one-meter-long dielectric waveguide. The working frequency range of the complete link is verified to be 110–150 GHz. The peak output power of the PAM modulator is 5 dBm, and it has a −3 dB bandwidth of 43 GHz. The PD consists of a parallel connected common emitter configured transistor and a common base configured transistor to suppress the odd-order harmonics at the PD’s output, as well as a stacked transistor to amplify the output signal. Tx and Rx chips, including pads, occupy a total area of only 0.83 mm2. The PMF link can support a PAM-4 signal with 22 Gbps data transmission, and a PAM-2 signal with 30 Gbps data transmission, with a bit error rate (BER) of <10−12, with demodulation performed in real time. Furthermore, the energy efficiency for the link (Tx + Rx) is 4.1 pJ/bit, using digital data input and receiving PAM-2 output (5.6 pJ/bit for PAM-4)

A 23 GHz Active Mixer with Integrated Diode Linearizer in SiGe BiCMOS Technology

Active mixers operating at 23 GHz are designed and fabricated in SiGe technology.An integrated diode linearizer is used to improve the linearity of the mixer.Measurement and simulation show excellent agreement.Typically,10 dB double-sideband noise figure, 10 dBm IIP3 and 2 dB conversion gain are measured, featuring low noise and high linearity in a same design

Backscattering change detection in SAR images using wavelet techniques

International Geoscience and Remote Sensing Symposium (IGARSS)31561-1563IGRS

Nonlinear integral transform between ocean wave spectra and phase image spectra of a cross-track interferometric SAR

International Geoscience and Remote Sensing Symposium (IGARSS)52619-2621IGRS

A 17 to 26 GHz micromixer in SiGe BiCMOS technology

Wereport, for the first time, our experimental results of a high frequency Micromixer operating from 17 to 26 GHz in SiGe technology. Good linearity performance is achieved:typically 0 dBm input-referred P-1dB and 8 dBm IIP3.The conversion gain and double side band noise figureat23GHzRFinput are –3.6 dB and 18.2 dB, respectively.The local oscillator power required for proper operation is below 0 dBm and the DC power consumption is 86 mW for a 3.3 V supply. For purpose of comparison, a Gilbert mixer isalso implanted on the same wafer.The experimental results are compared for the two active mixers

Study on ocean oil spill detection using different ERS SAR resolution data

International Geoscience and Remote Sensing Symposium (IGARSS)2806-808IGRS

A novel frequency multiplier

It is an object to obtain a frequency multiplier which simultaneously can generate more than one multiple of an input frequency. This object is obtained by means of a frequency multiplier which comprises a first and a second stage connected in series with each other. The first stage is arranged to receive an input AC signal and to generate an output signal comprising harmonics of the input AC signal and to deliver these harmonics to the second stage, which is arranged to receive the output signal from the first stage. In the frequency multiplier, the second stage comprises integer N bipolar/FET transistors, each of which is arranged to receive the output signal from the first stage at its base/gate and to be biased by means of a base/gate bias voltage. In the frequency multiplier’s second stage, the base/gate bias voltage of transistor number n in the second stage is higher than that of transistor number n+1, and each of the N transistors in the second stage has its collector/drain connected to a high pass filter